Technology

Aspens Creek is developing High Bandwidth Flash as a new storage architecture for the AI era. We have completed a working 2-controller prototype and are pursuing a 3D stacked 32+ controller design targeting 1.6+ TB/s.

Software Support:
• runtime SDK(C++ / Python)
• PyTorch plugin
• KV cache manager
• weight streaming API
• profiling tool

KPI:
• token latency jitter ↓80%
• GPU memory reduction ↓30–60%
• model per node ↑3–5x
• cost/token ↓ x%

Completed milestone

We have finished the design and implementation of a 2-controller HBF architecture. This working prototype validates the controller design approach, internal coordination, and bandwidth aggregation model.

Next architecture step

The next generation is a 3D stacked HBF design with 32 controllers intended to dramatically increase accessible throughput and move toward a manufacturable platform.

Architecture path

Stage 1
2 controllers
prototype complete
Stage 2
32 controllers
3D stacked design
Stage 3
1.6 TB/s
target throughput

Why HBF